-- 信号扩展：把一个小于"101"的高电平信号扩展成一个"101"周期的信号（间距大于"101"周期）
-- 若在把这个信号经过边沿检测，那么这个就实现把一次高电平扩展成一个"101"周期的信号（间距大于"101"周期））
-- 区别在于，上面的高电平大于"101"周期时，则每"101"周期扩展一次
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

entity processs is
 port(
  d : in std_logic;
  clk : in std_logic;
  q   : out std_logic
 );
end processs;
------------------------------

architecture vr1 of processs is
 signal cn : std_logic_vector(2 downto 0) := "000";
begin
 p1:process(clk,d)
 begin
  if (clk'event and clk='1')then
   if(d='1' and cn="000") then
    cn <= "101";
       elsif(cn>"001")then
    cn <= cn-'1';
   else
    cn <= "000";
   end if;
  end if;
 end process p1;
 
 --q <='0' when(cn ="000") else '1';                                                                                                                                                                                                                                                         ';
 p2:process(clk)
 begin
  if (clk'event and clk='1')then
   if(cn="000")then
    q <='0';
   else
    q <='1';
   end if;
  end if;
 end process p2;
 
end vr1;

architecture vr2 of processs is
 signal cn : std_logic_vector(2 downto 0) := "000";
begin
 p1:process(clk,d)
 begin
  if (clk'event and clk='1')then
   if(d='1' and cn="000") then
    cn <= "101";
   elsif(cn>"000")then
    cn <= cn-'1';
   end if;
  end if;
 end process p1;
 
 p2:process(clk)
 begin
  if (clk'event and clk='1')then
   if(cn="000")then
    q <='0';
   else
    q <='1';
   end if;
  end if;
 end process p2;
 
end vr2;

architecture vr3 of processs is
 signal cn : std_logic_vector(2 downto 0) := "000";
begin
 p1:process(clk,d)
 begin
  if (clk'event and clk='1')then
   if(d='1' and cn="000") then
    cn <= "101";
   elsif(cn>"000")then
    cn <= cn-'1';
   end if;
  end if;
 end process p1;
 q <='0' when cn="000" else '1';
 p2:process(clk)
 begin
  if (clk'event and clk='1')then
   -- q <='0' when cn="000" else '1'; 不能在进程中
  end if;
 end process p2;
 
end vr3;

configuration two_process of processs is
 for vr2
 end for;
end two_process;

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